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SN54LS74AJ, Texas Instruments

74LS Family Flip-Flops & Latches, Texas Instruments Texas Instruments range of Flip-Flops and Latches from the 74LS Family of Low Power Schottky Logic ICs. The 74LS Family use bipolar junction technology coupled with Schottky diode clamps to achieve operating speeds equal to the original 74TTL family but with much lower power consumption. 74LS Family

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TC74HC273AP(F), Toshiba

TC74HC Series, Toshiba High-Speed CMOS Logic Operating Voltage: 2 to 6 V Compatibility: Input CMOS, Output CMOS 74HC Family

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TC74HC74AF(F), Toshiba

TC74HC Series, Toshiba High-Speed CMOS Logic Operating Voltage: 2 to 6 V Compatibility: Input CMOS, Output CMOS 74HC Family

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74LCX374FT, Toshiba

The 74LCX374FT is a high-performance CMOS octal D-type flip-flop. Designed for use in 3.3-V systems, it achieves high-speed operation while maintaining the CMOS low power dissipation. The device is designed for low-voltage (3.3 V) VCC applications, but it could be used to interface to 5-V supply environment for both inputs and outputs. This 8-bit D-type flip-flop is controlled by a clock input (CK) and an output enable input (OE).When the OE input is high, the eight outputs are in a high-impedance state. All inputs are equipped with protection circuits against static discharge. Low-voltage operation: VCC = 1.65 to 3.6 V High-speed operation: tpd = 8.5 ns (max) (VCC = 3.0 to 3.6 V) Output current: |IOH|/IOL = 24 mA (min) (VCC = 3.0 V) Power-down protection provided on all inputs and outputs Pin and function compatible with the 74 series (74LVC/ALVC/ etc.) 374 type

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74VHC74FT, Toshiba

The 74VHC74FT is an advanced high speed CMOS D-FLIP FLOP fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. The signal level applied to the D INPUT is transferred to Q OUTPUT during the positive going transition of the CK pulse. CLR and PR are independent of the CK and are accomplished by setting the appropriate input low. An input protection circuit ensures that 0 to 5.5 V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5 V to 3 V systems and two supply systems such as battery back up. This circuit prevents device destruction due to mismatched supply and input voltages. Wide operating temperature range: Topr = -40 to 125  High speed: fMAX = 185 MHz (typ.) at VCC = 5.0 V Low power dissipation: ICC = 4.0 μA (max) at Ta = 25 High noise immunity: VNIH = VNIL = 28 % VCC (min) Power-down protection is provided on all inputs. Balanced propagation delays: tPLH ≈ tPHL Wide operating voltage range: VCC(opr) = 2.0 V to 5.5 V Low noise: VOLP = 1.0 V (max) Pin and function compatible with the 74 series (74AC/HC/AHC/LV etc.) 74 type

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